In order to realize a high-speed cycle using a DRAM (Dynamic Random Access Memory), it is necessary to increase the speed of the write cycle. In the DRAM for a destructive read operation, when the write operation is carried out, a rewrite operation needs to be done in a write-selected cell of the same word line, as well. Usually, the write operation is carried out as follows. Once the data in the memory cell is read out to a sense amplifier and after amplification to a certain degree and carrying out a rewrite operation, new data is written into the sense amplifier from an input/output (I/O) line. Therefore, in writing an opposite data, the amplified data needs to be inverted to a certain level, and then amplified, which results in an increase in the write time. In order to speed up the write operation, a “Write before Sense” system is disclosed in the International Solid-State Circuits Conference 2000 WP24-1. According to this system, in reading data from a memory cell, new data is written into a selected sense amplifier. As the data is written before the amplification, a high-speed write operation can be realized.